TPS16632RGET datasheet(16/43 Pages) TI1

No. de pieza	TPS16632RGET

Descripción Electrónicos	TPS1663x 60-V, 6-A eFuse with Adjustable Output Power Limiting

PDF	43 Pages

Scroll/Zoom	100%

Fabricante Electrónico	TI1 [Texas Instruments]

Página de inicio	http://www.ti.com

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16 / 43 page

UVLO

OVP

V(IN)

UVLOb

OVP

1.2 V

1.12 V

1.2 V

1.12 V

GND

P_IN

VIN

VOUT

PGOOD

IIN

TPS1663

SLVSET9D – SEPTEMBER 2018 – REVISED AUGUST 2019

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Product Folder Links: TPS1663

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Feature Description (continued)

CdVdT = Open

COUT = 15 mF

RILIM = 4.02 kΩ

Figure 16. Thermal Regulation Loop Response During Power up with Large Capacitive Load

9.3.2 Undervoltage Lockout (UVLO)

The TPS1663x devices feature an accurate ± 2% adjustable undervoltage lockout functionality. When the voltage

at UVLO pin falls below V(UVLOF) during input undervoltage fault, the internal FET quickly turns off and FLT is

asserted. The UVLO comparator has a hysteresis of 78 mV (typical). To set the input UVLO threshold, connect a

resistor divider network from IN supply to UVLO terminal to GND as shown in Figure 17. If the Under-Voltage

Lock-Out function is not needed, the UVLO terminal must be connected to the IN terminal. UVLO terminal must

not be left floating.

Figure 17. UVLO and OVP Thresholds Set by R1 , R2 and R3

TPS16632RGET Datasheet(PDF) 16 Page - Texas Instruments