3

All data sheets are subject to change without notice

©2005 Maxwell Technologies

All rights reserved.

16-Bit Latchup Protected ADC

7805ALP

01.10.05 Rev 9

Analog Inputs

V

IN

CAP

REF

-25

V

S

9

--

--

--

25

AGND2 - 0.3

--

V

Ground Voltage Difference

DGND

AGND1

AGND2

-0.3

-0.3

-0.3

--

--

--

0.3

0.3

0.3

V

Supply Input

V

S

--

7

V

Digital Inputs

-0.3

--

VS + 0.3

V

Thermal Impedance

Θ

JC

11

Internal Power Dissipation

--

--

825

mW

Maximum Junction Temperature

T

J

--

--

165

(V

Integral Linearity Error

--

--

±3

LSB

Differential Linearity Error

--

--

4, -1

LSB

1. Guaranteed by design

15

--

--

Bits

2. Typical rms noise at worst case transitions and temperatures.

--

1.3

--

LSB

3. Measured with various fixed resistors.

4. Full scale error is worst case - Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided

by the transition voltage (not divided by the full-scale range) and included the effect of offset error.

--

--

±0.5

%

Full Scale Error Drift

--

±7

--

--

--

±10

mV

Bipolar Zero Error Drift

--

±2

--

Power Supply Sensitivity

4.8V < V

--

--

±8

LSB

(V

V

IL

1, 2, 3

-0.3

--

0.8

V

V

IH

2.0

--

V

V