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IS25LP032D-RBLA3:P Datasheet(PDF) 80 Page - Integrated Silicon Solution, Inc

No. de pieza IS25LP032D-RBLA3:P
Descripción Electrónicos  SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  118 Pages
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Fabricante Electrónico  ISSI [Integrated Silicon Solution, Inc]
Página de inicio  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP032D-RBLA3:P Datasheet(HTML) 80 Page - Integrated Silicon Solution, Inc

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IS25LP032D
IS25WP032D
Integrated Silicon Solution, Inc.- www.issi.com
80
Rev. A12
08/04/2020
Figure 8.59 Software Reset Enable and Software Reset Sequence In QPI Mode (RSTEN, 66h + RST, 99h)
66h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0
99h
0
1
8.35 SECURITY INFORMATION ROW
The security Information Row is comprised of an additional 4 x 256 bytes of programmable information. The security
bits can be reprogrammed by the user. Any program security instruction issued while an erase, program or write
cycle is in progress is rejected without having any effect on the cycle that is in progress.
Table 8.7 Information Row Valid Address Range
Address Assignment
A[23:16]
A[15:8]
A[7:0]
IRL0 (Information Row Lock0)
00h
00h
Byte address
IRL1
00h
10h
Byte address
IRL2
00h
20h
Byte address
IRL3
00h
30h
Byte address
Bit 7~4 of the Function Register is used to permanently lock the programmable memory array.
When Function Register bit IRLx =
“0”, the 256 bytes of the programmable memory array can be programmed.
When Function Register bit IRLx =
“1”, the 256 bytes of the programmable memory array function as read only.



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