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STSPIN32F0ATR Datasheet(PDF) 29 Page - STMicroelectronics |
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STSPIN32F0ATR Datasheet(HTML) 29 Page - STMicroelectronics |
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29 / 41 page ![]() STSPIN32F0A Device description DocID030766 Rev 2.0 29/41 Figure 12: HSE clock source timing diagram Figure 13: Typical application with 8 MHz crystal In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. The REXT value depends on the crystal characteristics (refer to the crystal resonator manufacturer for more details on them). 6.6.4 Advanced-control timer (TIM1) The advanced-control timer (TIM1) can be seen as a three-phase PWM multiplexed on six channels. It has complementary PWM outputs with programmable inserted deadtimes. This timer is used to generate the PWM signal for the three half-bridge gate drivers as shown in Table 10: "TIM1 channel configuration". Table 10: TIM1 channel configuration MCU I/O Analog IC input TIM1 channel PB13 LS1 TIM1_CH1N PB14 LS2 TIM1_CH2N PB15 LS3 TIM1_CH3N PA8 HS1 TIM1_CH1 PA9 HS2 TIM1_CH2 PA10 HS3 TIM1_CH3 |
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