ELD5016 datasheet(12/38 Pages) EMC

12 / 38 page

eLD5016

8-Bit Microcontroller



Product Specification (V1.0) 2.16.2017

(This specification is subject to change without prior notice)

5.1.4 R3 (STA: IOC Page, Status Flags)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

IOCPAGE

R/W-0

R-0

R/W

Bit 7 (IOCPAGE): Change IOC5 ~ IOCE to another page

0: IOC PAGE0

1: IOC PAGE1

Bits 6 ~ 5:

Undefined bits, set to

“0” at all time

Bit 4 (T):

Time-out bit

Set to “1” with "SLEP" and "WDTC" commands or during power up, and

reset to “0” by WDT time-out.

Bit 3 (P):

Power down bit

Set to “1” during power on or by a "WDTC" command, and reset to “0” by

a "SLEP" command.

Event

Remark

WDT wake up from sleep mode

WDT time out (not sleep mode)

/RESET wake up from sleep

power up

Low pulse on /RESET

Don’t care

Bit 2 (Z):

Zero flag

Set to "1" if the result of an arithmetic or logic operation is zero.

Bit 1 (DC):

Auxiliary carry flag

Bit 0 (C):

Carry flag

5.1.5 R4 (RBSR: RAM Bank, RAM Select for Common Registers

R20 ~ R3F)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RB1

RB0

RSR5

RSR4

RSR3

RSR2

RSR1

RSR0

R/W-0

R/W

Bits 7 ~ 6 (RB1 ~ 0):

Bank select bits for Common Registers R20 ~ R3F

These select bits are used to determine which bank is activated among

the four banks for 32 registers (R20 to R3F). Refer to Figure 5-3 Control

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