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R7FA2L1AB2DFN Datasheet(PDF) 39 Page - Renesas Technology Corp |
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R7FA2L1AB2DFN Datasheet(HTML) 39 Page - Renesas Technology Corp |
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39 / 110 page  Note 1. The sub-clock oscillator or LOCO itself continues oscillating in Software Standby mode during Subosc-speed mode. Oscillator ICLK IRQ Software Standby mode tSBYSC, tSBYLO Oscillator ICLK IRQ Software Standby mode tSBYMC, tSBYEX, tSBYMO, tSBYHO Figure 2.10 Software Standby mode cancellation timing Table 2.25 Timing of recovery from low power modes (5) Parameter Symbol Min Typ Max Unit Test conditions Recovery time from Software Standby mode to Snooze mode High-speed mode System clock source is HOCO tSNZ — 4.1 5.2 µs Figure 2.11 Middle-speed mode System clock source is HOCO (24 MHz) VCC = 1.8 V to 5.5 V tSNZ — 4.2 5.3 µs Middle-speed mode System clock source is HOCO (24 MHz) VCC = 1.6 V to 1.8 V tSNZ — 8.3 10 µs Low-speed mode System clock source is MOCO (2 MHz) tSNZ — 6.7 8.0 µs RA2L1 Datasheet 2. Electrical Characteristics R01DS0385EJ0100 Rev.1.00 Aug 06, 2020 Page 39 of 110 |
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