STM32H747AI datasheet(152/252 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32H747xI/G

142/242

DS12930 Rev 1

6.3.15

EMC characteristics

Susceptibility tests are performed on a sample basis during device characterization.

Functional EMS (electromagnetic susceptibility)

While a simple application is executed on the device (toggling 2 LEDs through I/O ports).

the device is stressed by two electromagnetic events until a failure occurs. The failure is

indicated by the LEDs:

•

Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until

a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.

•

FTB: A burst of fast transient voltage (positive and negative) is applied to VDD and VSS

through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant

with the IEC 61000-4-4 standard.

A device reset allows normal operations to be resumed.

The test results are given in Table 66. They are based on the EMS levels and classes

defined in application note AN1709.

Vprog

Programming voltage

Program parallelism x 8

1.62

3.6

Program parallelism x 16

Program parallelism x 32

Program parallelism x 64

1.8

3.6

1. Guaranteed by characterization results.

2. The maximum programming time is measured after 10K erase operations.

Table 64. Flash memory programming (single bank configuration nDBANK=1) (continued)

Symbol

Parameter

Conditions

Min(1)

Typ

Max(1)

Unit

Table 65. Flash memory endurance and data retention

Symbol

Parameter

Conditions

Value

Unit

Min(1)

NEND

Endurance

TJ = –40 to +125 °C (6 suffix versions)

kcycles

tRET

Data retention

1 kcycle at TA = 85 °C

Years

10 kcycles at TA = 55 °C

1. Guaranteed by characterization results.

Table 66. EMS characteristics

Symbol

Parameter

Conditions

Level/

Class

VFESD

Voltage limits to be applied on any I/O pin to induce

a functional disturbance

VDD = 3.3 V, TA = +25 °C,

UFBGA240, frcc_c_ck =

400 MHz, conforms to

IEC 61000-4-2

VFTB

Fast transient voltage burst limits to be applied

through 100 pF on VDD and VSS pins to induce a

functional disturbance

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