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ADP7118ACPZN3.3-R7 Datasheet(PDF) 4 Page - Analog Devices

No. de pieza ADP7118ACPZN3.3-R7
Descripción Electrónicos  20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator
PDF  24 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

ADP7118ACPZN3.3-R7 Datasheet(HTML) 4 Page - Analog Devices

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ADP7118
Data Sheet
Rev. F | Page 4 of 24
INPUT AND OUTPUT CAPACITANCE, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
INPUT AND OUTPUT CAPACITANCE
Minimum Capacitance1
CMIN
TA = −40°C to +125°C
1.5
µF
Capacitor Effective Series Resistance (ESR)
RESR
TA = −40°C to +125°C
0.001
0.3
Ω
1
The minimum input and output capacitance must be greater than 1.5 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended,
while Y5V and Z5U capacitors are not recommended for use with any LDO.



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