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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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VG6640 Datasheet(PDF) 83 Page - STMicroelectronics |
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VG6640 Datasheet(HTML) 83 Page - STMicroelectronics |
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83 / 126 page  DocID023597 Rev 11 83/126 VG6640, VD6640 Video system 125 7.3.5 Integration and gain parameter re-timing Due to the triple exposure architecture and various latencies the period in the frame where a specific register can be set to be consumed before the next frame starts is as shown in Figure 25 Figure 25. CCI parameter update window The last moment to update registers so that they will apply to next frame integration tracks with the start of the next frame: 113 lines to end of current frame + 46 lines inter frame = 159 lines to before the start of next frame. If you increase the inter frame, then the moment remains defined as: 159 lines before the start of the next frame. 7.3.6 Grouped register settings If a large number of registers are required to be set in a single frame, due to the timing of the CCI commands some transactions may be consumed in the immediate frame, the remainder in the next frame. To avoid this problem, bit 0 of the Grouped_Parameter_Hold (0x0104) register should be used to inhibit the application of new register values until the complete set of new values have been written to the sensor. Bit 0 should be set to 1, registers written, then the bit cleared. This will ensure that all registers are consumed at the same time. An example of the multiple CCI grouped writes is shown in Figure 26. |
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