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AD9546/PCBZ Datasheet(PDF) 156 Page - Analog Devices

No. de pieza AD9546/PCBZ
Descripción Electrónicos  Dual DPLL Digitized Clock Synchronizer
PDF  205 Pages
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AD9546/PCBZ Datasheet(HTML) 156 Page - Analog Devices

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AD9546
Data Sheet
Rev. 0 | Page 156 of 205
TAGGED TIME STAMPS
A tagged time stamp is a time stamp with a unique marker, or
tag, attached to it. Tagged time stamps allow the AD9546 to use
a lower frequency clock embedded within a higher frequency
clock. For example, by tagging every 10th edge of a clock signal,
there is a carrier signal (that is, the original clock signal) and a
divide by 10 version of the carrier embedded within the signal
resulting from the tagged time stamps.
The various time stamp sources within the AD9546 can
generate tagged time stamps (the auxiliary NCOs, for example).
Likewise, certain time stamp destinations within the AD9546
are capable of processing only tagged time stamps while
ignoring untagged time stamps (the user time stamp
processors, for example, described in the User Time Stamp
Processor (UTSP) section). However, the two DPLLs are the
most important of the time stamp destinations capable of using
tagged time stamps (see the Time Stamp Tagging Options
section).
Tagged Auxiliary NCO Time Stamps
The auxiliary NCOs generate time stamps coincident with the
expiration of each period defined by the programmed auxiliary
NCO frequency (that is, at the rollover point of the phase
accumulator). For example, an NCO frequency of 100 Hz
results in the generation of time stamps at a 100 Hz rate with
each time stamp 10 ms greater than the previous one.
The time stamp generator gives the user the option of tagging
auxiliary NCO time stamps via Bits[15:0] in Register 0x280B to
Register 0x280C (for Auxiliary NCO 0) and Register 0x284B to
Register 0x284C (for Auxiliary NCO 1).
The value, N, represented by Bits[15:0] (tag ratio) results in every
Nth time stamp being tagged. For example, Bits[15:0] = 1 decimal
means every other time stamp is tagged. Similarly, a decimal
value of 2 means every third time stamp is tagged. Likewise, a
decimal value of 3 means every fourth time stamp is tagged.
This pattern continues to 65,535. A decimal value of 0 (default)
disables time stamp tagging (no tags).
The user can also shift the time position of the tagged flags
Bits[15:0] in Register 0x280D to Register 0x280E (for Auxiliary
NCO 0) and Register 0x284D to Register 0x284E (for Auxiliary
NCO 1). Bits[15:0] are an autoclearing bit field. The value, K,
represented by Bits[15:0], is a signed integer (twos complement)
indicating a number of fundamental periods of the auxiliary
NCO. Thus, for K = −3, the time stamp processor tags time
stamps three time stamps earlier than the Nth time stamp
locations indicated by the tag ratio described previously. K is
effectively a phase shift of the tagged time stamp period, where
K < N.
Note that when the auxiliary NCO is the reference to the DPLL
for an active translation profile (see the Translation Profiles
section), shifting the time position of a tag is not valid and must
be avoided. When using the tag shift feature, be sure that any
translation profiles using the auxiliary NCO as a DPLL
reference are not enabled, or if they are enabled, that the
associated DPLL is in freerun or holdover mode.
Tagged Reference Time Stamps
Tags associated with time stamps originating from the reference
TDCs are the result of demodulating an embedded clock (see
the Reference Demodulator section). Synchronization events
associated with demodulation generate tagged time stamps.
The user can program the DPLL to use the tagged time stamps
from a reference TDC.
Tagged Feedback Time Stamps
Tagged time stamps originating from the DPLL feedback path
are the result of synchronization events associated with the
modulation controller (see the Modulation section). The user
can program the DPLL to use the tagged time stamps from a
feedback TDC.



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