L6982 datasheet(25/48 Pages) STMICROELECTRONICS

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The device internally implements a low pass filter connected to EN/CLKIN pin that is able to acquire the average

value of the applied signal.

The device turns on when the average of the signal applied is higher than VEN rising (refer to Table 6). The device

turns off when the average of the signal should be lower than VEN falling (refer to Table 6).

Considering, for example, a clock source with VPP = 5.0 V, the minimum duty cycle to guarantee the power-up is

given by:

Dutymin =VEN,TH Rising

VPP =0.24

(26)

The maximum duty cycle to guarantee the turn off is given by:

DutyMAX, =VEN,TH Falling

VPP =0.2

(27)

The device allows also the AC coupling.

Figure 28. External synchronization. AC coupling

(*) Synchronization is allowed only for LNM versions.

The AC-coupling allows the device to keep the power-up and down thresholds defined by the partition connected

to the EN/CLKIN pin and described in the "Programmable power up threshold" section.

The following table resumes the minimum pulse duration and maximum duty cycle that allow the synchronization,

keeping the selected power-up and down thresholds.

Table 7. External synchronization AC coupling suggested operation range

VPP [V]

TON,MIN [ns]

DMAX [%]

2.3

3.3

The minimum amplitude for the external clock signal is, for both the configurations, equal to 2.3 V.

The network given by CEN and RENL sets a high pass filter. Considering a resistor in the order of 220 KΩ, a

capacitor equal to 1 nF is a correct choice.

8.3

Output voltage adjustment

The error amplifier reference voltage is 0.85 V typical (refer to Table 6). The output voltage is adjusted accordingly

with the following equation:

L6982

Output voltage adjustment

DS13683 - Rev 1

page 25/48

L6982 Datasheet(PDF) 25 Page - STMicroelectronics