ACE34AC04

4K I

VER 1.1

14

Table 6: Set RSWP and Clear RSWP

Function

Pin

Control Byte

Device Type Identifier

Memory Quadrant Identifier

R/ W

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Set RSWP,

Quadrant 0

X

X

V

HV

0

1

1

0

0

0

1

0

Set RSWP,

Quadrant 1

X

X

1

0

0

0

Set RSWP,

Quadrant 2

X

X

1

0

1

0

Set RSWP,

Quadrant 3

X

X

0

0

0

0

Clear RSWP

X

X

0

1

1

0

X = Don’t care but recommended to be hard-wired to VCC or GND.

fully supported in a single DIMM (isolated DIMM) end application or a single DIMM programming station

only.

Figure 11: Set RSWP and Clear RSWP

X = Don’t care

(B)

Clear RSWP

Similar to the Set RSWP command, the reversible write protection on all quadrants can be reversed

or unprotected by transmitting the Clear RSWP command. The Clear RSWP sequence requires the

Master to send a Start condition followed by sending a control byte of „01100110‟(66h) with the R/W

bit set to a Logic 0. The ACE34AC04 should respond with an ACK. The Master transmits a word

address byte and data bytes with don’t care values. The ACE34AC04 will respond with either an

ACK or NACK to both the word address and data word. In conjunction with sending the protocol, the

A0 pin must be connected to VHV for the duration of the Clear RSWP command. To end the Clear

RSWP sequence, the Master sends a Stop condition.