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SST26VF040A-80I/MFVXX Datasheet(PDF) 29 Page - Microchip Technology

No. de pieza SST26VF040A-80I/MFVXX
Descripción Electrónicos  2.5V/3.0V 4-Mbit Serial Quad I/O??(SQI?? Flash Memory
PDF  73 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST26VF040A-80I/MFVXX Datasheet(HTML) 29 Page - Microchip Technology

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 2020-2021 Microchip Technology Inc.
DS20006292B-page 29
SST26VF040A
5.19
Chip Erase
The Chip Erase instruction clears all bits in the device
to ‘1’. The Chip Erase instruction is ignored if any of the
memory area is protected. Prior to any write operation,
execute the WREN instruction.
To execute a Chip Erase operation, the host drives CE#
low, sends the Chip Erase command cycle (C7H or
60H), then drives CE# high. Poll the BUSY bit in the
STATUS register, or wait TSCE, for the completion of the
internal, self-timed, write operation. See Figures 5-25
and 5-26 for the Chip Erase sequence.
FIGURE 5-25:
CHIP ERASE SEQUENCE (SQI)
FIGURE 5-26:
CHIP ERASE SEQUENCE (SPI)
Note:
C[1:0] = C7H
MODE 3
0
1
SCK
SIO[3:0]
CE#
C1 C0
MODE 0
CE#
SO
SI
SCK
0 1 234 5 6 7
C7
High-Impedance
MODE 0
MODE 3
MSB



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