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6.6 Supply Voltage Requirements for Power-On Reset and Power-Down

(see (1))

MIN

MAX

UNIT

tVCC

VCCINT rise time from 0 V to nominal voltage (2)

0.2

VCCPOR

POR threshold for VCCINT supply

0.5

–

tOER

OE/ RESET release delay following POR (3)

0.5

VCCPD

Power-down threshold for VCCINT supply

0.5

tRST

Time required to trigger a device reset when the VCCINT supply drops below the

maximum VCCPD threshold

(1)

VCCINT, VCCO, and VCCJ supplies can be applied in any order.

(2)

At power-up, the device requires the VCCINT power supply to monotonically rise to the nominal operating voltage within the specified

tVCC rise time. If the power supply cannot meet this requirement, then the device might not perform power-on-reset properly. See

Platform Flash PROM Power-Up Requirements, in the Xilinx XCF16P (v2.19) Product Specification for more information.

(3)

If the VCCINT and VCCO supplies do not reach their respective recommended operating conditions before the OE/ RESET pin is

released, then the configuration data from the PROM is not available at the recommended threshold levels. The configuration

sequence must be delayed until both VCCINT and VCCO have reached their recommended operating conditions.

6.7 Timing Requirements

Refer to the XCF16P product specifications at www.xilinx.com.

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DLPR410

DLPS027G – AUGUST 2012 – REVISED AUGUST 2021

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DLPS024 Datasheet(PDF) 7 Page - Texas Instruments