USB7016SLASHKDX datasheet(22/60 Pages) MICROCHIP

22 / 60 page

USB7016

DS00003740B-page 22

 2022 Microchip Technology Inc. and its subsidiaries

PRT_CTL5

I/O12

(PU)

Port 5 power enable / overcurrent sense

When the downstream port is enabled, this pin is set as an input

with an internal pull-up resistor applied. The internal pull-up

enables power to the downstream port while the pin monitors for an

active low overcurrent signal assertion from an external current

monitor on USB port 5.

This pin will change to an output and be driven low when the port is

disabled by configuration or by the host control.

Note:

This signal controls both the USB 2.0 and USB 3.2 por-

tions of the port.

Note 3-5

This pin can be left unused only if Port 5 is

disabled via strap/OTP/SMBus/SPI configuration.

Float

(Note 3-5)

PRT_CTL4

I/O12

(PU)

Port 4 power enable / overcurrent sense

When the downstream port is enabled, this pin is set as an input

with an internal pull-up resistor applied. The internal pull-up

enables power to the downstream port while the pin monitors for an

active low overcurrent signal assertion from an external current

monitor on USB port 4.

This pin will change to an output and be driven low when the port is

disabled by configuration or by the host control.

Note:

When PortSplit is disabled, this signal controls both the

USB 2.0 and USB 3.2 portions of the port. When

PortSplit is enabled, this signal controls the USB 2.0

portion of the port only.

Note 3-6

This pin can be left unused only if Port 4 is

disabled via strap/OTP/SMBus/SPI configuration.

Float

(Note 3-6)

PRT_CTL3

I/O12

(PU)

Port 3 power enable / overcurrent sense

When the downstream port is enabled, this pin is set as an input

with an internal pull-up resistor applied. The internal pull-up

enables power to the downstream port while the pin monitors for an

active low overcurrent signal assertion from an external current

monitor on USB port 3.

This pin will change to an output and be driven low when the port is

disabled by configuration or by the host control.

Note:

When PortSplit is disabled, this signal controls both the

USB 2.0 and USB 3.2 portions of the port. When

PortSplit is enabled, this signal controls the USB 2.0

portion of the port only.

Note 3-7

This pin can be left unused only if Port 3 is

disabled via strap/OTP/SMBus/SPI configuration.

Float

(Note 3-7)

TABLE 3-6:

PROGRAMMABLE FUNCTIONS DESCRIPTIONS (CONTINUED)

Function

Buffer

Type

Description

If Unused

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