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MPC5644BCAMMJ1 Datasheet(PDF) 83 Page - NXP Semiconductors |
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MPC5644BCAMMJ1 Datasheet(HTML) 83 Page - NXP Semiconductors |
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83 / 116 page  Electrical Characteristics MPC5646C Microcontroller DataSheet, Rev. 7 NXP Semiconductors 83 Figure 22. MII transmit signal timing diagram 4.18.3 MII Async Inputs Signal Timing (CRS and COL) Figure 23. MII async inputs timing diagram 4.18.4 MII Serial Management Channel Timing (MDIO and MDC) The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. Table 45. MII transmit signal timing1 1 Output pads configured with SRE = 0b11. Spec Characteristic Min Max Unit M5 TX_CLK to TXD[3:0], TX_EN, TX_ER invalid 5— ns M6 TX_CLK to TXD[3:0], TX_EN, TX_ER valid —25 ns M7 TX_CLK pulse width high 35% 65% TX_CLK period M8 TX_CLK pulse width low 35% 65% TX_CLK period Table 46. MII Async Inputs Signal Timing1 1 Output pads configured with SRE = 0b11. Spec Characteristic Min Max Unit M9 CRS, COL minimum pulse width 1.5 — TX_CLK period M6 TX_CLK (input) TXD[3:0] (outputs) TX_EN TX_ER M5 M7 M8 CRS, COL M9 |
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