STM32F405 datasheet(114/204 Pages) STMICROELECTRONICS

114 / 204 page

Electrical characteristics

STM32F405xx, STM32F407xx

114/203

DS8626 Rev 9

5.3.16

I/O port characteristics

General input/output characteristics

Unless otherwise specified, the parameters given in Table 48 are derived from tests

performed under the conditions summarized in Table 14. All I/Os are CMOS and TTL

compliant.

Note:

For information on GPIO configuration, refer to application note AN4899 “STM32 GPIO

configuration for hardware settings and low-power consumption” available from the ST

website www.st.com.

Table 47. I/O current injection susceptibility

Symbol

Description

Functional susceptibility

Unit

Negative

injection

Positive

injection

IINJ(1)

Injected current on BOOT0 pin

− 0

Injected current on NRST pin

− 0

Injected current on PE2, PE3, PE4, PE5, PE6,

PI8, PC13, PC14, PC15, PI9, PI10, PI11, PF0,

PF1, PF2, PF3, PF4, PF5, PF10, PH0/OSC_IN,

PH1/OSC_OUT, PC0, PC1, PC2, PC3, PB6,

PB7, PB8, PB9, PE0, PE1, PI4, PI5, PI6, PI7,

PDR_ON, BYPASS_REG

− 0

Injected current on all FT pins

− 5NA

Injected current on any other pin

− 5+5

1. It is recommended to add a Schottky diode (pin to ground) to analog pins which may potentially inject negative currents.

Table 48. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

FT, TTa and NRST I/O input low

level voltage

1.7 V ≤ VDD ≤ 3.6 V

0.3VDD-0.04(1)

0.3VDD(2)

BOOT0 I/O input low level

voltage

1.75 V ≤ VDD ≤ 3.6 V

-40 °C≤ TA ≤ 105 °C

0.1VDD-+0.1(1)

1.7 V ≤ VDD ≤ 3.6 V

0 °C≤ TA ≤ 105 °C

VIH

FT, TTa and NRST I/O input low

level voltage

1.7 V ≤ VDD ≤ 3.6 V

0.45VDD+0.3(1)

0.7VDD(2)

BOOT0 I/O input low level

voltage

1.75 V ≤ VDD ≤ 3.6 V

-40 °C≤ TA ≤ 105 °C

0.17VDD+0.7(1)

1.7 V ≤ VDD ≤ 3.6 V

0 °C≤ TA ≤ 105 °C

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