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DVR Datasheet(PDF) 133 Page - Microchip Technology

No. de pieza DVR
Descripción Electrónicos  16-Bit General Purpose Microcontrollers with 256-Kbyte Flash and 16-Kbyte RAM in Low Pin Count Packages
PDF  416 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DVR Datasheet(HTML) 133 Page - Microchip Technology

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 2016-2018 Microchip Technology Inc.
DS30010118D-page 133
PIC24FJ256GA705 FAMILY
REGISTER 11-8:
IOCPx: INTERRUPT-ON-CHANGE POSITIVE EDGE x REGISTER(1,2,3)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
IOCPx<15:8>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IOCPx<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
IOCPx<15:0>: Interrupt-on-Change Positive Edge x Enable bits
1 = Interrupt-on-Change is enabled on the IOCx pin for a positive going edge; the associated status bit
and interrupt flag will be set upon detecting an edge
0 = Interrupt-on-Change is disabled on the IOCx pin for a positive going edge
Note 1:
Setting both IOCPx and IOCNx will enable the IOCx pin for both edges, while clearing both registers will
disable the functionality.
2:
Changing the value of this register while the module is enabled (IOCON = 1) may cause a spurious IOC
event. The corresponding interrupt must be ignored, cleared (using IOCFx) or masked (within the interrupt
controller), or this module must be enabled (IOCON = 0) when changing this register.
3:
See Table 11-3, Table 11-4 and Table 11-5 for individual bit availability in this register.
REGISTER 11-9:
IOCNx: INTERRUPT-ON-CHANGE NEGATIVE EDGE x REGISTER(1,2,3)
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
IOCNx<15:8>
bit 15
bit 8
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
IOCNx<7:0>
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-0
IOCNx<15:0>: Interrupt-on-Change Negative Edge x Enable bits
1 = Interrupt-on-Change is enabled on the IOCx pin for a negative going edge; the associated status bit
and interrupt flag will be set upon detecting an edge
0 = Interrupt-on-Change is disabled on the IOCx pin for a negative going edge
Note 1:
Setting both IOCPx and IOCNx will enable the IOCx pin for both edges, while clearing both registers will
disable the functionality.
2:
Changing the value of this register while the module is enabled (IOCON = 1) may cause a spurious IOC
event. The corresponding interrupt must be ignored, cleared (using IOCFx) or masked (within the interrupt
controller), or this module must be enabled (IOCON = 0) when changing this register.
3:
See Table 11-3, Table 11-4 and Table 11-5 for individual bit availability in this register.



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