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TSV7721 Datasheet(PDF) 19 Page - STMicroelectronics |
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TSV7721 Datasheet(HTML) 19 Page - STMicroelectronics |
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19 / 32 page ![]() 5.4 EMI rejection The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many op amps is a change in the offset voltage as a result of RF signal rectification. EMIRR is defined in Eq. (2): EMIRR=20.log Vin pp∆Vio (2) The TSV771 and TSV772 have been specially designed to minimize susceptibility to EMIRR and shows a low sensitivity. As can be seen in Figure 44. EMIRR on In+, In- and Out pins, EMI rejection ratio has been measured on both inputs and output, from 400 MHz to 2.4 GHz. Figure 44. EMIRR on In+, In- and Out pins EMIRR performances might be improved by adding small capacitances (in the pF range) on the inputs, power supply and output pins. These capacitances help to minimize the impedance of these nodes at high frequencies. 5.5 Maximum power dissipation The usable output load current drive is limited by the maximum power dissipation allowed by the device package. The absolute maximum junction temperature for the TSV772 is 150 °C. The junction temperature can be estimated as follows: TJ=PD×θJA+TA (3) TJ is the die junction temperature PD is the power dissipated in the package θJA is the junction-to-ambient thermal resistance of the package TA is the ambient temperature The power dissipated in the package PD is the sum of the quiescent power dissipated and the power dissipated by the output stage transistor. It is calculated as follows: PD= VCC×ICC + VCC+−VOUT ×ILoadwhentheopampissourcingthecurrent. PD= VCC×ICC + VOUT−VCC− ×ILoadwhentheopampissinkingthecurrent. Do not exceed the 150 °C maximum junction temperature for the device. Exceeding the junction temperature limit can cause degradation in the parametric performance or even destroy the device. TSV771, TSV772 EMI rejection DS13842 - Rev 3 page 19/32 |
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