L9945 datasheet(24/151 Pages) STMICROELECTRONICS

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•

VPOR ≤ VDD5 ≤ 4.5 V:

–

SPI functional (if VIO is stable);

–

Internal oscillator is functional and the logic is working correctly;

–

The outputs can switch according to the control;

–

Regulators for open load detection may provide wrong diagnostic;

–

Overcurrent shutdown is active but thresholds may be inaccurate.

NRES assertion:

•

NRES input is active low;

•

It is typically connected to the VDD5 reset of the ECU power supply;

•

NRES is internally pulled up: in case of NRES pin left unconnected, NRES is inactive;

•

Open load failure detection is inactive during NRES assertion;

•

Charge pump is disabled while NRES is asserted.

Both POR and NRES events are latched and readable via SPI:

•

After POR, the n_POR_LATCH is set and can be cleared via SPI readout;

•

When NRES is active, NRES_LATCH is set and can be cleared via SPI readout.

The two reset events are ORed, so that full functionality is achieved only when both POR and NRES are

released.

The default configuration for the outputs after reset is Low-Side with NFET. Channels are three-stated until the

output is enabled through the en_OUT_xx bit.

After configuration and enable, all outputs follow the control signal as long as reset (NRES, POR) is not active. In

case of a reset all outputs will be immediately disabled and all diagnostic and protection information will be lost.

5.4

Output pre-drivers

This paragraph contains the available configurations for the output pre-drivers. Enable and control strategies are

explained. Output diagnostic is also explained, along with other useful application information.

5.4.1

Available configurations

There are eight pre-driver channels. Each channel can be independently configured in three different ways, via

SPI configuration commands:

•

Low-Side with NFET;

•

High-Side with NFET;

•

High-Side with PFET.

Channel side is programmed through LS_HS_config_xx bit, while FET type is selected through N_P_config_xx

bit. Refer to Section 2 Applications in order to understand how the external FET must be mounted with respect

to device pins. Complex configurations for H-Bridge and Peak & Hold are presented in their respective section.

5.4.2

Default configuration and output enable

After reset channels are configured as Low-Side with NFET by default. Outputs are in three-state until they are

configured and enabled through the en_OUT_xx bit.

Channel 6 has an additional enable control via the EN6 input: EN6 is in logical AND with en_OUT_06 bit,

meaning that both signals have to be set high in order to enable the output driver. This feature makes it suitable

for safety relevant load control. EN6 status can be monitored reading EN6_STATE bit via SPI. If channel 6 has

been disabled setting EN6 low, the event is latched in EN6_LATCH, cleared on SPI readout.

5.4.3

Output control

The outputs can be controlled ON and OFF via SPI bit SPI_ON_OUTxx or input pins NONx. The selection of the

control signal is independent for each channel and is programmed via the SPI_input_sel_xx bit:

•

SPI_input_sel_xx = 0: control via NONx input

–

The NONx inputs are active low, meaning that the output is ON when the input is low and vice-versa

L9945

Output pre-drivers

DS12275 - Rev 8

page 24/151

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