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PWD5F60 Datasheet(PDF) 8 Page - STMicroelectronics

No. de pieza PWD5F60
Descripción Electrónicos  High density power driver - high voltage full bridge with integrated comparators
PDF  26 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PWD5F60 Datasheet(HTML) 8 Page - STMicroelectronics

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Symbol
Pin
Parameter
Test condition
Min. Typ. Max Unit
td_comp
CP+x to CPOUTx
Comparator delay
Rpu = 100 kΩ to 5 V
VCP- = 0.5 V;
Voltage step on CP+ = 0 to 3.3 V;
50% CP+ to 90% CPOUT
-
90
130
ns
IOD
CPOUTx
Open-drain low level sink
current
CPOUT = 400 mV,
VCP+ = 1 V, VCP- = 0.5 V
2.4
-
-
mA
IODlk
Open-drain leakage current
CPOUT = 15 V,
VCP+ = 0 V, VCP- = 0.5 V
-
-
1
µA
SRCPOUT CPOUTx
Comparator output slew rate
CL = 180 pF
Rpu = 5 kΩ to 5 V
CPOUT from 90% to 10%
-
60
-
V/µs
Dead time
DT
DTx
Dead time setting range .(3)
RDT = 0
0.1 0.18 0.25
µs
RDT = 37 kΩ, CDT = 100 nF
0.48 0.6
0.72
RDT = 136 kΩ, CDT = 100 nF
1.35 1.6
1.85
RDT = 260 kΩ, CDT = 100 nF
2.6
3.0
3.4
MDT
Matching dead time (3) (4)
RDT = 0
-
-
80
ns
RDT = 37 kΩ, CDT = 100 nF
-
-
120
RDT = 136 kΩ, CDT = 100 nF
-
-
250
RDT = 260 kΩ, CDT = 100 nF
-
-
400
1. RBD(on) is tested in the following way: RBD(on) = [(VCC - VBOOTa) - (VCC - VBOOTb)] / [Ia - Ib], where: Ia is BOOT pin current
when VBOOT = VBOOTa; Ib is BOOT pin current when VBOOT = VBOOTb.
2. The comparator is disabled when VCC is in UVLO condition.
3. Tested at wafer level before packaging
4. MDT = | DTLH – DTHL |.
PWD5F60
Driver
DS12543 - Rev 1
page 8/26



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