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ST7294

6.6 EEPROM

Symbol

Parameter

Test Conditio ns

Value

Unit

Min.

Typ.

Max.

TWEE

EEPROM Write Time

0 to 70

°C2

Endurance

EEPROM Write/Erase

Cycles

QA Lot

Acceptance Criteria

300.000

> 1 million

cycles

Retention

EEPROM Data Retention TA =55°C10

Years

6.7 TEST CONDITIONS

Details relating to standard test conditions are giv-

en in Table 12 below. The standard electrical Test

Diagram is shown in Figure 22.

The voltage present on the INT pin determines the

device’s operating mode, as described in Table 13

below.

CAUTION:

The INT pin is also used to select an

internal non-user test mode reserved exclusively

for use by SGS-THOMSON Microelectronics. This

non-user mode is entered on the rising edge of the

Reset signal, if:

– the voltage applied to the INT pin is less than

VDD + 0.5V, the device will initialise correctly in

User mode;

– if a “high” voltage (typically > VDD +3V, @ VDD

= +5V) is applied to the pin, the device will start

in a reserved non-user mode.

Under certain operating conditions apparent de-

vice malfunction may be experienced: this may be

described as follows:

During the Reset phase, if the VDD supply risetime

is slow, the Reset rising edge may occur at a volt-

age level lower than the minimum allowed voltage

of 2.5V. In this case, the “high” voltage which

needs to be applied to the INT pin to enter the spe-

cial mode may be as low as 3.5V, and such a volt-

age level may be supplied by the external interrupt

source, thus provoking an apparent system mal-

function.

For this reason it is strongly recommended to

manage the INT pin, either by tying it to V

DD, if un-

used, or by connecting it to VDD via a diode, if it is

to be used: this will avoid unexpected entry into

non-user mode.

Table 12. Equivalent Test Load

Table 13. Device Operating Mode Selection

Figure 22. Test Diagram

VDD =3V

Pins

PA0-PA7

PB0-PB7

PC1, PC5, PC6,

PC7

10.91k

Ω

6.32k

Ω

50pF

VDD = 4.5V

Pins

PA0-PA7

PB0-PB7

PC1, PC5, PC6,

PC7

3.26k

Ω

2.38k

Ω

50pF

Voltage on INT pin

Operating Mode

VDD

User Mode

VSS

Interrupt

VDD + 3V (typically)

Factory Test

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