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DF2B7AFS Datasheet(PDF) 2 Page - Toshiba Semiconductor |
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DF2B7AFS Datasheet(HTML) 2 Page - Toshiba Semiconductor |
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2 / 8 page ![]() DF2B7AFS 2 5. Quick Reference Data Characteristics Working peak reverse voltage Total capacitance Dynamic resistance Electrostatic discharge voltage (IEC61000-4-2) (Contact) Symbol VRWM Ct RDYN VESD Note (Note 1) (Note 2) (Note 3) Test Condition � VR = 0 V, f = 1 MHz � � Min � � � � Typ. � 8.5 0.2 � Max 5.5 10 � 30 Unit V pF Ω kV Note 1: Recommended operating condition. Note 2: TLP parameters: Z0 = 50 Ω, tp = 100 ns, tr = 300 ps, averaging window: t1 = 30 ns to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP characteristics between IPP1 = 8 A and IPP2 = 16 A. Note 3: Criterion: No damage to devices. 5.1. ESD Clamp Waveform (Note) Fig. 5.1.1 +8 kV Fig. 5.1.2 -8 kV Fig. 5.1.3 IEC61000-4-2 (Contact) Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 2022-08-22 Rev.3.0 ©2016-2022 Toshiba Electronic Devices & Storage Corporation |
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