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KSZ9563RNXC Datasheet(PDF) 128 Page - Microchip Technology

No. de pieza KSZ9563RNXC
Descripción Electrónicos  3-Port Gigabit Ethernet Switch with RGMII/MII/RMII Interface and IEEE 1588v2
PDF  226 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9563RNXC Datasheet(HTML) 128 Page - Microchip Technology

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KSZ9563R
DS00002419D-page 128
 2017-2018 Microchip Technology Inc.
5.2
Port Registers
This section details the device’s port registers. All settings are on a per-port basis. Address field “N” specifies the port
number. Valid values for “N” are 1,2,3 for some registers, 3 for MAC port specific registers, and 1,2 for PHY specific
registers.
For an overview of the device’s entire register map, refer to Section 5.0, "Device Registers". For details on the device’s
global registers, refer to Section 5.1, "Global Registers".
5.2.1
PORT N: PORT OPERATION CONTROL REGISTERS (0xN000 - 0xN0FF)
5.2.1.1
Port Default Tag 0 Register
5.2.1.2
Port Default Tag 1 Register
5.2.1.3
Port AVB SR Class 1 Tag 0 Register
Address:
0xN000
Port N: 1-3
Size:
8 bits
Bits
Description
Type
Default
7:0
Port Default 802.1Q Tag [15:8]
Bits [7:5]: Priority Code Point (PCP)
Bit [4]: Drop Eligible Indicator (DEI)
Bits [3:0]: VLAN Identifier (VID) [11:8]
R/W
0x00
Address:
0xN001
Port N: 1-3
Size:
8 bits
Bits
Description
Type
Default
7:0
Port Default 802.1Q tag [7:0]
VLAN Identifier (VID) [7:0]
R/W
0x01
Address:
0xN004
Port N: 1-3
Size:
8 bits
Bits
Description
Type
Default
7:0
SR Class 1 Tag 0
Port custom tag containing:
7-5: User priority bits
4: CFI bit
3-0: SR class VID[11:8] 1
R/W
0x60



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