UPSD3422_V01 datasheet(64/300 Pages) STMICROELECTRONICS

No. de pieza	UPSD3422

Descripción Electrónicos	Turbo Plus series Fast Turbo 8032 MCU with USB and programmable logic

PDF	300 Pages

Scroll/Zoom	100%

Fabricante Electrónico	STMICROELECTRONICS [STMicroelectronics]

Página de inicio	http://www.st.com

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64 / 300 page

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Interrupt system

UPSD3422, UPSD3433, UPSD3434, UPSD3454

64/300

Figure 12.

Enabling and polling interrupts

13.1

Individual interrupt sources

13.1.1

External interrupts Int0 and Int1

External interrupt inputs on pins EXTINT0 and EXTINT1 (pins 3.2 and 3.3) are either edge-

triggered or level-triggered, depending on bits IT0 and IT1 in the SFR named TCON.

When an external interrupt is generated from an edge-triggered (falling-edge) source, the

appropriate flag bit (IE0 or IE1) is automatically cleared by hardware upon entering the ISR.

When an external interrupt is generated from a level-triggered (low-level) source, the

appropriate flag bit (IE0 or IE1) is NOT automatically cleared by hardware.

Reserved

Ext

INT0

Ext

INT1

Timer 0

UART0

Timer 1

SPI

USB

Timer 2

High

Low

Interrupt

Sources

IE/IEA

IP/IPA

Priority

Global

Enable

ADC

PCA

UART1

AI07844

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Product(s)

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Product(s)

UPSD3422 Datasheet(PDF) 64 Page - STMicroelectronics

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