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SW52212 Datasheet(PDF) 21 Page - Silicon Laboratories

No. de pieza SW52212
Descripción Electrónicos  12/8/4/2-Output PCI-Express Gen 1/2/3/4/5 and SRIS Clock Generator
PDF  71 Pages
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Fabricante Electrónico  SILABS [Silicon Laboratories]
Página de inicio  http://www.silabs.com
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SW52212 Datasheet(HTML) 21 Page - Silicon Laboratories

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5.3 Calculating Load Capacitors
In addition to the standard external trim capacitors, consider the trace capacitance and pin capacitance to calculate the crystal loading
correctly. The total capacitance on both sides is twice the specified crystal load capacitance (CL). Trim capacitors are calculated to
provide equal capacitive loading on both sides.
Clock Chip
Ce1
Ce2
Cs1
Cs2
X1
X2
Ci1
Ci2
Pin
3 to 6 pF
Trace
2.8 pF
Trim
7-24 pF
XTAL
Figure 5.2. Crystal Loading Example
Use the following formulas to calculate the trim capacitor values for Ce1 and Ce2:
Load Capacitance (each side)
Ce = 2 × CL − (Cs + Ci)
Total Capacitance (as seen by the crystal)
CLe =
1
(
1
Ce + Cs1 + Ci1
+
1
Ce2 + Cs2 + Ci2 )
• CL: Crystal load capacitance
• CLe: Actual loading seen by crystal using standard value trim capacitors
• Ce: External trim capacitors
• Cs: Stray capacitance (terraced)
• Ci : Internal capacitance (lead frame, bond wires, etc.)
Data Sheet
Functional Description
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