74LVC10DB datasheet(4/8 Pages) PHILIPS

4 / 8 page

Philips Semiconductors

Product specification

74LVC10

Triple 3-input NAND gate

1997 Apr 28

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

Temp = -40

°C to +85°C

UNIT

MIN

TYP1

MAX

HIGH level Input voltage

VCC = 1.2V

VCC

VIH

HIGH level Input voltage

VCC = 2.7 to 3.6V

2.0

LOW level Input voltage

VCC = 1.2V

GND

VIL

LOW level Input voltage

VCC = 2.7 to 3.6V

0.8

VCC = 2.7V; VI = VIH or VIL; IO = –12mA

VCC*0.5

HIGH level output voltage

VCC = 3.0V; VI = VIH or VIL; IO = –100µA

VCC*0.2

VCC

VOH

HIGH level output voltage

VCC = 3.0V; VI = VIH or VIL; IO = –12mA

VCC*0.6

VCC = 3.0V; VI = VIH or VIL; IO = –24mA

VCC*1.0

VCC = 2.7V; VI = VIH or VIL; IO = 12mA

0.40

VOL

LOW level output voltage

VCC = 3.0V; VI = VIH or VIL; IO = 100µA

0.20

VCC = 3.0V; VI = VIH or VIL; IO = 24mA

0.55

Input leakage current

VCC = 3.6V; VI = 5.5V or GND Not for I/O pins

"0.1

µA

IIHZ/IILZ

Input current for common I/O pins

VCC = 3.6V; VI = VCC or GND

"0.1

"15

µA

IOZ

3-State output OFF-state current

VCC = 3.6V; VI = VIH or VIL; VO = VCC or GND

0.1

"10

µA

ICC

Quiescent supply current

VCC = 3.6V; VI = VCC or GND; IO = 0

0.1

µA

∆ICC

Additional quiescent supply current per

input pin

VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0

500

µA

NOTE:

1. All typical values are at VCC = 3.3V and Tamb = 25°C.

AC CHARACTERISTICS

GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF

LIMITS

SYMBOL

PARAMETER

WAVEFORM

VCC = 3.3V ±0.3V

VCC = 2.7V

VCC = 1.2V

UNIT

MIN

TYP1

MAX

MIN

MAX

TYP

tPHL/

tPLH

Propagation delay

nA, nB, nC to nY

Figures 1, 2

–

3.9

6.4

–

7.5

–

NOTE:

1. These typical values are at VCC = 3.3V and Tamb = 25°C.

AC WAVEFORMS

VM = 1.5 V at VCC w 2.7 V

VM = 0.5 S VCC at VCC < 2.7 V

VOL and VOH are the typical output voltage drop that occur with the

output load.

SV00420

nA, nB, nC

INPUT

nY OUTPUT

t PLH

t PHL

GND

VOL

VOH

Figure 1. Input (nA, nB, nC) to output (nY)

propagation delays.

TEST CIRCUIT

PULSE

GENERATOR

D.U.T.

50pF

< VCC

Open

GND

500

Ω

500

Ω

VCC

t 2.7V

VCC

2.7V – 3.6V

2.7V

Test

GND

tPLZ/tPZL

< VCC

tPHZ/tPZH

tPLH/tPHL

Open

SY00003

VCC

Figure 2. Load circuitry for switching times.

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