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STM32U595AI Datasheet(PDF) 83 Page - STMicroelectronics

No. de pieza STM32U595AI
Descripción Electrónicos  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datasheet(HTML) 83 Page - STMicroelectronics

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DS13633 Rev 1
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STM32U59xxx
Functional overview
94
All RTC events (alarm, wake-up timer, timestamp) can generate an interrupt and wake up
the device from the low-power modes.
3.45.2
Tamper and backup registers (TAMP)
The anti-tamper detection circuit is used to protect sensitive data from external attacks. 32
32-bit backup registers are retained in all low-power modes and also in VBAT mode. The
backup registers, as well as other secrets in the device, are protected by this anti-tamper
detection circuit with eight tamper pins and eleven internal tampers. The external tamper
pins can be configured for edge detection, or level detection with or without filtering, or
active tamper that increases the security level by auto checking that the tamper pins are not
externally opened or shorted.
TAMP main features:
•
A tamper detection can erase the backup registers, backup SRAM, SRAM2, caches,
and HASH peripheral.
•
32 32-bit backup registers:
–
The backup registers (TAMP_BKPxR) are implemented in the Backup domain that
remains powered-on by VBAT when the VDD power is switched off.
•
Up to 8 tamper pins for 8 external tamper detection events:
–
Active tamper mode: continuous comparison between tamper output and input to
protect from physical open-short attacks
–
Flexible active tamper I/O management: from 4 meshes (each input associated to
its own exclusive output) to 7 meshes (single output shared for up to 7 tamper
inputs)
–
Passive tampers: ultra-low power edge or level detection with internal pull-up
hardware management
–
Configurable digital filter
•
11 internal tamper events to protect against transient or environmental perturbation
attacks:
–
Backup domain voltage monitoring
–
Temperature monitoring
–
LSE monitoring
–
RTC calendar overflow
–
JTAG/SWD access if RDP different from 0
–
Monotonic counter overflow
–
RNG fault
–
Independent watchdog reset when tamper flag is already set
–
3 ADC4 watchdogs
•
Each tamper can be configured in two modes:
–
Hardware mode: immediate erase of secrets on tamper detection, including
backup registers erase
–
Software mode: erase of secrets following a tamper detection launched by
software
•
Any tamper detection can generate a RTC time stamp event.



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