STM32U595AI datasheet(285/377 Pages) STMICROELECTRONICS

285 / 377 page

DS13633 Rev 1

285/377

STM32U59xxx

Electrical characteristics

343

Figure 39. 12-bit buffered/non-buffered DAC

2. In buffered mode, the output can overshoot above the final value for low input code (starting from the minimum value).

3. Refer to Table 84: I/O static characteristics.

4. TON is the refresh phase duration. TOFF is the hold phase duration (see the product reference manual for more details).

MSv47959V2

12-bit

digital-to-analog

converter

Buffered/non-buffered DAC

DAC_OUTx

RLOAD

CLOAD

Buffer

(1)

(1) The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads

directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in

the DAC_CR register.

Table 105. DAC accuracy(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

DNL

Differential

non-linearity(2)

DAC output buffer ON

±2

LSB

DAC output buffer OFF

±2

Monotonicity

10 bits

guaranteed

INL

Integral

non-linearity(3)

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ

±4

LSB

DAC output buffer OFF, CL ≤ 50 pF, no RL

±4

Offset

Offset error at code

0x800(3)

DAC output buffer OFF, CL ≤ 50 pF, no RL

±8

LSB

Offset1

Offset error at code

0x001(4)

DAC output buffer OFF, CL ≤ 50 pF, no RL

±5

OffsetCal

Offset error at code

0x800(3)

after calibration

DAC output buffer ON,

CL ≤ 50 pF, RL ≥ 5 kΩ

VREF+ = 3.6 V

±5

VREF+ = 1.6 V

±5

Gain

Gain error(5)

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ

±0.5

DAC output buffer OFF, CL ≤ 50 pF, no RL

±0.5

TUE

Total unadjusted error

DAC output buffer OFF, CL ≤ 50 pF, no RL

±10

LSB

DAC output buffer ON, CL ≤ 50 pF, RL ≥ 5 kΩ,

after calibration

±14

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