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STM32U595AI Datasheet(PDF) 290 Page - STMicroelectronics

No. de pieza STM32U595AI
Descripción Electrónicos  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU,240 DMIPS, up to 4 MB Flash, 2.5 MB SRAM, LTDC, MIPI® DSI
PDF  377 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U595AI Datasheet(HTML) 290 Page - STMicroelectronics

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Electrical characteristics
STM32U59xxx
290/377
DS13633 Rev 1
5.3.26
Operational amplifiers characteristics
IDDA(COMP)
Comparator consumption
from VDDA
High-speed mode, static
-
48
90
µA
High-speed mode, with 50 kHz,
±100 mV overdrive square signal
-50-
Medium mode, static
-
3
6
Medium mode, with 50 kHz, ±100 mV
overdrive square signal
-3.75
-
Ultra-low-power mode, static
-
0.3
1
Ultra-low-power mode, with 50 kHz,
±100 mV overdrive square signal
-0.65
1. Specified by design and not tested in production, unless otherwise specified.
2. The input capacitance is negligible compared to the I/O capacitance.
3. Refer to Table 35: Embedded internal voltage reference.
4. No VREFINT division, includes only buffer consumption.
5. VREFINT division, includes resistor bridge and buffer consumption.
6. Evaluated by characterization. Not tested in production.
7. Mostly I/O leakage when used in analog mode. Refer to Ilkg parameter in Table 84: I/O static characteristics.
Table 107. COMP characteristics(1)(2) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 108. OPAMP characteristics(1)(2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Analog supply voltage
range for OPAMP ON
-1.60
-
3.6
V
CMIR
Common mode input
range
-0
-
VDDA
VIOFFSET
Input offset voltage
TJ = 30 °C, no load on output,
Normal mode
--
±3
mV
TJ= 30 °C, no load on output,
Low-power mode
--
±3
All voltages and temperature,
Normal mode
--
±7
All voltages and temperature,
Low-power mode
--
±11.5
∆VIOFFSET
Input offset voltage drift
over temperature
Normal mode
-
±7
-
μV/°C
Low-power mode
-
±15
-
TRIMOFFSETP
TRIMLPOFFSETP
Offset trim step at low
common input voltage
(0.1 × VDDA)
-
-
1.05
1.25
mV
TRIMOFFSETN
TRIMLPOFFSETN
Offset trim step at high
common input voltage
(0.9 × VDDA)
-
-
1.05
1.25



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