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STM32H7B3II Datasheet(PDF) 164 Page - STMicroelectronics |
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STM32H7B3II Datasheet(HTML) 164 Page - STMicroelectronics |
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164 / 238 page ![]() Note: At VOS1, the performance in Transmit mode can be degraded by up to 5 % compared to VOS0. This is indicated by a footnote when applicable. Table 110. PSSI transmit characteristics Guaranteed by characterization results. Symbol Parameter Min Max(1) Unit - Frequency ratio PSSI_PDCK/fHCLK - 0.4 - PSSI_PDCK PSSI clock input - 50 MHz Dpixel PSSI clock input duty cycle 30 70 % tdv(DATA) Data output valid time - 10 ns tdh(DATA) Data output hold time 5 - tdv((DE) DE output valid time - 14 tdh(DE) DE output hold time 6 - tsu(RDY) RDY input setup time 3 - th(RDY) RDY input hold time 0 - 1. At VOS1, these values are degraded by up to 5 %. Table 111. PSSI receive characteristics Guaranteed by characterization results. Symbol Parameter Min Max - Frequency ratio PSSI_PDCK/fHCLK - 0.4 PSSI_PDCK PSSI clock input - 100 Dpixel PSSI clock input duty cycle 30 70 tsu(DATA) Data input setup time 2 - th(DATA) Data input hold time 1 - tsu((DE) DE input setup time 3 - th(DE) DE input hold time 1 - tov(RDY) RDY output valid time - 10 toh(RDY) RDY output hold time 4.5 - STM32H7B3xI Operating conditions DS13139 - Rev 8 page 164/238 |
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