STM32U545NET3QTR datasheet(136/283 Pages) STMICROELECTRONICS

136 / 283 page

Electrical characteristics

STM32U545xx

136/283

DS14216 Rev 1

VIN

I/O input voltage

All I/Os except FT_c and

TT_xx pins

-0.3

Min(min(VDD, VDDA, VDDUSB,

VDDIO2) +3.6, 5.5)(4)(5)

Input voltage on FT_t pins

in VBAT mode

-0.3

Min(min(VBAT, VDDA,

VDDUSB, VDDIO2)+ 3.6,

5.5)(4)(5)

FT_c I/Os

-0.3

5.0

TT_xx I/Os

-0.3

VDDIOx + 0.3

IIO_SW

Sum of output

current sourced by

all I/Os powered by

VSW(6)

VCORE

Internal regulator

Range 1

1.15

1.21

1.27

Range 2

1.05

1.1

1.15

Range 3

0.95

1.0

1.05

Range 4

0.81

0.9

0.99

fHCLK

AHB clock

frequency

Range 1

160

MHz

Range 2

110

Range 3

Range 4

fPCLKx

(x = 1, 2, 3)

APB1, APB2,

APB3 clock

frequency

Range 1

160

Range 2

110

Range 3

Range 4

Ambient

temperature

for suffix 6

Maximum power

dissipation

–40

°C

Low-power dissipation(7)

–40

105

Ambient

temperature

for suffix 3

Maximum power

dissipation

–40

125

Low-power dissipation(7)

–40

130

Junction

temperature range

Suffix 6 version

–40

105

Suffix 3 version

–40

130

1. HSLV means high-speed low-voltage mode (refer to the product reference manual).

2. When RESET is released, the functionality is guaranteed down to VBORx min.

3. In VBAT mode, the functionality is guaranteed down to VBOR_VBAT min.

4. This formula has to be applied only on the power supplies related to the I/O structure described by the pin definition table.

The maximum I/O input voltage is the smallest value between Min (VDD, VDDA, VDDUSB, VDDIO2)+3.6 V, and 5.5V.

5. For operation with voltage higher than Min (VDD, VDDA, VDDUSB, VDDIO2) +0.3 V, the internal pull-up and pull-down resistors

must be disabled.

Table 33. General operating conditions (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

STM32U545NET3QTR Datasheet(PDF) 136 Page - STMicroelectronics

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