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STM32U545NET3QTR Datasheet(PDF) 37 Page - STMicroelectronics

No. de pieza STM32U545NET3QTR
Descripción Electrónicos  Ultra-low-power Arm® Cortex®-M33 MCUTrustZone®FPU,240 DMIPS, 512 KB flash memory, 274 KB SRAM, crypto
PDF  283 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32U545NET3QTR Datasheet(HTML) 37 Page - STMicroelectronics

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DS14216 Rev 1
37/283
STM32U545xx
Functional overview
88
Stop 2
LPR
No
OFF
ON(5)
LSE
LSI
BOR, PVD, PVM,
RTC, TAMP, IWDG,
TEMP, VREFBUF,
ADC4,
DAC1 (2 channels),
COMP1,
OPAMP1,
LPUART1,
SPI3,
I2C3,
LPTIMx (x = 1, 3, 4),
ADF1,
LPGPIO,
LPDMA1
All other peripherals are frozen.
Reset pin, all I/Os,
BOR, PVD, PVM,
RTC, TAMP, IWDG,
TEMP,
ADC4,
COMP1,
LPUART1,
SPI3,
I2C3,
LPTIMx (x = 1,3,4),
ADF1,
LPDMA1
Stop 3
LPR
No
OFF
ON(5)
LSE
LSI
BOR,
RTC, TAMP, IWDG,
DAC1 (2 static channels),
OPAMP1
All other peripherals are frozen.
I/O configuration can be floating,
pull-up or pull-down.
Reset pin,
24 I/Os (WKUPx),
BOR, RTC, TAMP,
IWDG
Standby
LPR
OFF
LSE
LSI
BOR, RTC, TAMP, IWDG
All other peripherals are
powered off.
I/O configuration can be floating,
pull-up or pull-down.
Reset pin,
24 I/Os (WKUPx),
BOR, RTC, TAMP,
IWDG
OFF
Shutdown
OFF
OFF
LSE
RTC, TAMP
All other peripherals are
powered off.
I/O configuration can be floating,
pull-up or pull-down(15).
Reset pin,
24 I/Os (WKUPx),
RTC, TAMP
Table 9. STM32U545xx mode overview (continued)
Mode
Regulator(1) CPU Flash SRAM Clocks
DMA and peripherals(2)
Wake-up source



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