MPC96877

556

FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA

TEST CIRCUIT AND SWITCHING WAVEFORMS (Continued)

Figure 8. Period Jitter

Figure 9. Half-Period Jitter

Figure 10. Input and Output Slew Rates

f0

Yx, FBOUT

Yx, FBOUT

1

f0

1

Yx, FBOUT

Yx, FBOUT

t cycle n

t cycle n

tjit(per) =

f0

Yx, FBOUT

Yx, FBOUT

1

2 * f0

1

t half period n+1

t half period n

n = any half cycle

t cycle n

tjit(hper) =

80%

80%

20%

20%

Clock Inputs

and

Outputs, OE

tr(i),tr(0)

V80% - V20%

slrr(i/o) =

tr(i/o)

V80%- V20%

slrf(i/o) =

tf(i/o)

tf(i),tf(0)

MPC96877

1.8 V PLL 1:10 Differential SDRAM Clock Driver

NETCOM

IDT™ 1.8 V PLL 1:10 Differential SDRAM Clock Driver

Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc

MPC96877

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