1337GCSRGI datasheet(4/28 Pages) RENESAS

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IDT1337G

REAL-TIME CLOCK WITH I2C SERIAL INTERFACE

RTC

IDT® REAL-TIME CLOCK WITH I2C SERIAL INTERFACE

IDT1337G

REV M 073013

Typical Operating Circuit

Detailed Description

Communications to and from the IDT1337G occur serially

over an I2C bus. The IDT1337G operates as a slave device

on the serial bus. Access is obtained by implementing a

START condition and providing a device identification code,

followed by data. Subsequent registers can be accessed

sequentially until a STOP condition is executed. The device

is fully accessible through the I2C interface whenever VCC

is between 5.5 V and 1.8 V. I2C operation is not guaranteed

when VCC is below 1.8 V. The IDT1337G maintains the time

and date when VCC is as low as 1.3 V.

The following sections discuss in detail the Oscillator block,

Clock/Calendar Register Block and Serial I2C block.

Oscillator Block

Selection of the right crystal, correct load capacitance and

careful PCB layout are important for a stable crystal

oscillator. Due to the optimization for the lowest possible

current in the design for these oscillators, losses caused by

parasitic currents can have a significant impact on the

overall oscillator performance. Extra care needs to be taken

to maintain a certain quality and cleanliness of the PCB.

Crystal Selection

The key parameters when selecting a 32 kHz crystal to work

with IDT1337G RTC are:

• Recommended Load Capacitance

• Crystal Effective Series Resistance (ESR)

• Frequency Tolerance

Effective Load Capacitance

Please see diagram below for effective load capacitance

calculation. The effective load capacitance (CL) should

match the recommended load capacitance of the crystal in

order for the crystal to oscillate at its specified parallel

resonant frequency with 0ppm frequency error.

In the above figure, X1 and X2 are the crystal pins of our

device. Cin1 and Cin2 are the internal capacitors which

include the X1 and X2 pin capacitance. Cex1 and Cex2 are

the external capacitors that are needed to tune the crystal

frequency. Ct1 and Ct2 are the PCB trace capacitances

between the crystal and the device pins. CS is the shunt

capacitance of the crystal (as specified in the crystal

manufacturer's datasheet or measured using a network

analyzer).

CPU

VCC

SQW/INTB

INTA

GND

SDA

SCL

CRYSTAL

IDT1337G

VCC

10k

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