2

Radiations

2.1

Total ionizing dose

All the devices of the HCC series are 100 krad guaranteed as per the test methods described in Table 1. TID test

conditions for the CMOS4000B family.

Table 1. TID test conditions for the CMOS4000B family

Test parameter

Test conditions

Total dose

100 krad(Si)

Dose rate

40 krad(Si)/h

Sampling

4 biased parts by wafer on 3 wafer per diffusion lot plus 1

control part to qualify the wafer lot. In case one wafer fails,

qualification is done wafer per wafer on 4 biased parts

Bias conditions(1)

VDD = 10 V(2) inputs at VDD(3)

Limits

VTHN, VTHP, IOL, IOH, TPHL, TPLH, VOL, VOH, VN, VP, VH: see

“ESCC detail specifications”, limits ± 35% for high and low

limits

Others tests performed as defined in “ESCC detail

specification” with corresponding limits

1. During irradiation.

2. VDD = 10 Volt has been demonstrated to be the worst case condition during characterization.

3. Whenever functionally pertinent.

Figure 2. Irradiation test flow

1. The post rad guaranteed Vcc min. is therefore 5 V.

HCC40xxx, HCC45xxx

Radiations

DS6709 - Rev 8

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