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CS5172GD8 Datasheet(PDF) 17 Page - ON Semiconductor |
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CS5172GD8 Datasheet(HTML) 17 Page - ON Semiconductor |
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17 / 21 page ![]() CS5171, CS5172, CS5173, CS5174 http://onsemi.com 17 TJ + TA)(PDqJA) where: TJ = IC or FET junction temperature ( °C); TA = ambient temperature ( °C); PD = power dissipated by part in question (W); qJA = junction−to−ambient thermal resistance (°C/W). For the CS517x, qJA=165°C/W. Once the designer has calculated TJ, the question of whether the CS517x can be used in an application is settled. If TJ exceeds 150 °C, the absolute maximum allowable junction temperature, the CS517x is not suitable for that application. If TJ approaches 150 °C, the designer should consider possible means of reducing the junction temperature. Perhaps another converter topology could be selected to reduce the switch current. Increasing the airflow across the surface of the chip might be considered to reduce TA. Circuit Layout Guidelines In any switching power supply, circuit layout is very important for proper operation. Rapidly switching currents combined with trace inductance generates voltage transitions that can cause problems. Therefore the following guidelines should be followed in the layout. 1. In boost circuits, high AC current circulates within the loop composed of the diode, output capacitor, and on−chip power transistor. The length of associated traces and leads should be kept as short as possible. In the flyback circuit, high AC current loops exist on both sides of the transformer. On the primary side, the loop consists of the input capacitor, transformer, and on−chip power transistor, while the transformer, rectifier diodes, and output capacitors form another loop on the secondary side. Just as in the boost circuit, all traces and leads containing large AC currents should be kept short. 2. Separate the low current signal grounds from the power grounds. Use single point grounding or ground plane construction for the best results. 3. Locate the voltage feedback resistors as near the IC as possible to keep the sensitive feedback wiring short. Connect feedback resistors to the low current analog ground. + + + C2 D2 C3 D1 C4 R2 1 2 3 4 5 6 7 8 22 mF 22 mF VOUT −12 V VC Test NFB SS 0.01 mF C1 VSW VCC AGND PGND VCC SS 5.0 V 5.0 k R1 R3 1.27 k 4.87 k MBRS120T3 MBRS120T3 22 mF 22 mH L1 Figure 41. Additional Application Diagram, 5.0 V to −12 V/ 75 mA Inverting Converter |
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