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INS8250 Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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INS8250 Datasheet(HTML) 3 Page - National Semiconductor (TI) |
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3 / 8 page ![]() 60 Software Compatibility Two of the conditions present in the INS8250-B are required in many of these personal computers (see Items 1 and 2 in Section 20) These two detect multiple pending interrupts from the INS8250-B and test the baud rate These two con- ditions were eliminated in the revision part and all parts thereafter Thus the more recent UARTs require that one of the following recommendations or a similar change is made to the target system Changing the software or hardware allows the more recent UARTs to replace the INS8250-B If the target system services the UART via polling rather than interrupts then all of the more recent parts will be plug-in replacements for the INS8250-B Note The NS16550AF has two pins with new functions (see the data sheet for specifics) 61 USING THE INS8250A NS16450 INS82C50A NS16C450 AND NS16550AF WITH EDGED-TRIGGERED ICUs Using these UARTs with an edge-triggered ICU as in some of the popular microcomputers requires a signal edge on the INTR pin for each pending UART interrupt Otherwise when multiple interrupts are pending the interrupt line will be con- stantly high active and the edge-triggered ICU will not re- quest additional service for the UART 62 CREATING AN INTERRUPT EDGE VIA SOFTWARE This is done by disabling and then re-enabling UART inter- rupts via the Interrupt Enable Register (IER) before a specif- ic UART interrupt handling routine (line status errors re- ceived data available transmitter holding register empty or modem status) is exited To disable interrupts write H’00 to the IER To re-enable interrupts write a byte containing ones to the IER bit positions whose interrupts are supposed to be enabled 63 CREATING AN INTERRUPT EDGE IN HARDWARE This is done externally to the UART One approach is to connect the INTR pin of the UART to the input of an AND gate The other input of this AND gate is connected to a signal that will always go low active when the UART is ac- cessed (see Figure 3 ) The output of the AND gate is used as the interrupt to the ICU Note This simple hardware recommendation will result in one invalid inter- rupt being generated so the software routine should be able to han- dle this The example shown below was tested using a modified asyn- chronous card in a few 8088-based microcomputer systems 70 Acknowledgements The editor expresses his gratitude to all of the applications design and field applications engineers whose laboratory and field research have discovered most of the technical information used in this document TLC9320 – 4 FIGURE 3 Creating an INTR Edge in Hardware 3 |
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