SN52020

2-Channel Speech Controller

5.10. Watch Dog

The WDT is cascade after system timer. When user reset system timer will issue a

clear signal to WDT also. It would issue a reset signal to chip if user doesn’t reset any

system timer before it reach terminate count (1 Second) when chip is in active mode.

5.11. I/O Ports

P3 is a 4-bit I/O port. Any bit of P3 can be programmed to be input or output

individually. Any valid data transition (H

L or L H) of P3 can reactivate the chip

when it is in power-down stage.

Port Data

Port Status

To Internal Data Bus

Read Control

PAD

Weak

Pull Low enable

I/O Port Configuration (P30~P33)

Note: All weak N-MOS’s can serve as pull-low resistors.

5.12. Pull-Low Resister Control

This function provides user to control Pull-Low register of all I/O ports that can be

disabled by user command. With the help of this function, input floating and input pull

low is supported.

Ver: 1.0

March 2,2005

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