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AP432ASRG-7 Datasheet(PDF) 5 Page - Diodes Incorporated

No. de pieza AP432ASRG-7
Descripción Electrónicos  ADJUSTABLE PRECISION SHUNT REGULATOR
PDF  12 Pages
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Fabricante Electrónico  DIODES [Diodes Incorporated]
Página de inicio  http://www.diodes.com
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AP432ASRG-7 Datasheet(HTML) 5 Page - Diodes Incorporated

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AP432/AP432A
ADJUSTABLE PRECISION SHUNT REGULATOR
AP432/AP432A Rev. 6
5 of 12
MARCH 2007
www.diodes.com
© Diodes Incorporated
Electrical Characteristics ( TA = 25
oC, V+ = +5.0V, unless otherwise stated )
Parameter
Test conditions
Symbol
Min.
Typ.
Max.
Unit
AP432
1.227
1.252
Reference Voltage
VKA = Vref,
I KA = 10mA (Fig.1)
AP432A
VREF
1.233
1.24
1.246
V
Deviation of Reference Input Voltage over
Temperature (Note 8)
VKA = VREF , IKA = 10mA ,
Ta = full range
(Fig.1)
VREF
3.0
20
mV
Ratio of the Change in Reference Voltage to
the Change in Cathode Voltage
IKA = 10mA
(Fig.2)
VKA = 20 ~VREF
KA
REF
V
V
∆
∆
-1.4
-2.0
mV/V
Reference Input Current
R1 = 10KΩ,R2 = ∞
IKA= 10mA (Fig.2)
IREF
1.4
3.5
µA
Deviation of Reference Input Current over
Temperature
R1 = 10KΩ,R2 = ∞
IKA = 10mA
Ta = Full range (Fig.2)
αIREF
0.4
1.2
µA
Minimum Cathode Current for Regulation
VKA = VREF (Fig.1)
IKA(min)
0.15
0.3
mA
Off-state Current
VKA = 20V , VREF = 0V (Fig.3)
IKA(off)
0.1
1.0
µA
Dynamic Output Impedance (Note 9)
V KA = VREF
Frequency
≤ 1KHz (Fig.1)
KA
Z
0.2
0.5
Ω
VMAX
VMIN
TI
T2
Temperature
VDEV = VMAX - VMIN
Note: 8. Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference over the full temperature
range. The average temperature coefficient of the reference input voltage
αVREF is defined as:
1
2
6
REF
DEV
REF
T
T
10
)
C)
(25
V
V
(
V
−
⋅
°
=
α
……………………..……………….. (
)
C
ppm
°
Where:
T2 – T1 = full temperature change.
αVREF can be positive or negative depending on whether the slope is positive or negative.
Note: 9. The dynamic output impedance, RZ, is defined as:
KA
KA
KA
I
V
Z
∆
∆
=
When the device is programmed with two external resistors R1 and R2 (see Figure 2.), the dynamic output impedance of the overall
circuit, is defined as:
)
R2
R1
(1
Z
i
v
Z
KA
'
KA
+
∆
∆
=
≈



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