PA2423L-EK1

RangeCharger

13-DST-03

Rev 2.3

Jan-18-2005

6 of 8

QA011805

Layout

Optimum layout of the application board is critical; the input and output matching networks are layout dependent and

will affect gain, output power, power added efficiency, current consumption and harmonics generation. The

connectors do form part of the input and output network. The routing to Vcc1 forms the interstage match for the

power amplifier.

As a reference design, the evaluation board has been optimized from a component and layout perspective to

maximize the performance of the PA2423L. Based on the schematic, the layout of the evaluation board is shown in

Figure 5. This information is also available as gerber files, for ease of use.

Care should be taken to avoid routing the RF output track next to Vcc1 as this provides feedback around the output

stage resulting in a loss in performance. The exposed pad at the bottom of the package is the ground connection for

the IC. The ground vias should be placed as close as possible to this pad. All VCC lines should be well decoupled

keeping the ground end of the decoupling capacitors as short as possible. The decoupling should avoid a ground

return loop to the IC ground.