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PCD3354AH Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCD3354AH Datasheet(HTML) 7 Page - NXP Semiconductors |
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7 / 32 page ![]() 1996 Dec 18 7 Philips Semiconductors Product specification 8-bit microcontrollers with DTMF generator and 256 bytes EEPROM PCA3354C; PCD3354A 6 FREQUENCY GENERATOR A versatile frequency generator section with built-in programmable clock divider is provided (see Fig.3). The clock divider allows the DTMF section to run either with the main clock frequency (fDTMF =fxtal) or with a third of it (fDTMF = 1⁄3 × fxtal) depending on the state of the divider control bit DIV3 (see Table 5). The frequency generator includes precision circuitry for dual tone multifrequency (DTMF) signals, which is typically used for tone dialling telephone sets. The TONE output can alternatively issue twelve modem frequencies for data rates between 300 and 1200 bits/s. In addition to DTMF and modem frequencies, two octaves of musical scale in steps of semitones are available. Their frequencies are provided either in purely sinusoidal form on the TONE output or as a square wave on the port line P1.7/MDY. The latter is typically for ringer applications in telephone sets. If no frequency output is selected the TONE output is in 3-state mode. 6.1 Frequency generator derivative registers 6.1.1 HIGH AND LOW GROUP FREQUENCY REGISTERS Table 3 gives the addresses, symbols and access types of the High Group Frequency (HGF) and Low Group Frequency (LGF) registers, used to set the frequency output. Table 3 Hexadecimal addresses, symbols, access types and bit symbols of the frequency registers 6.1.2 CLOCK AND MELODY CONTROL REGISTER (MDYCON) Table 4 Clock and Melody Control Register, MDYCON (address 13H; access type R/W) Table 5 Description of MDYCON bits REGISTER ADDRESS REGISTER SYMBOL ACCESS TYPE BIT SYMBOLS 7 6 5 4 3 2 1 0 11H HGF W H7H6H5H4H3H2H1H0 12H LGF W L7L6L5L4L3L2L1L0 7 6 5 4 3 2 1 0 0 0 0 0 0 EDCO DIV3 EMO BIT SYMBOL DESCRIPTION 7to3 − These bits are set to a logic 0. 2 EDCO Enable DTMF clock output. If bit EDCO = 0, then DP1.7/DCO is a general purpose derivative port line. If bit EDCO = 1, then DP1.7/DCO is the DTMF clock output. EDCO = 1 does not inhibit the port instructions for DP1.7/DCO. Therefore the state of both port line and flip-flop may be read in and the port flip-flop may be written by derivative port instructions. However, the port flip-flop of DP1.7/DCO must remain set to avoid conflicts between DTMF clock and port outputs. 1 DIV3 Enable DTMF clock divider. If bit DIV3 = 0, then the DTMF clock fDTMF =fxtal. If bit DIV3 = 1, then fDTMF = 1⁄3 × fxtal. 0 EMO Enable Melody Output. If bit EMO = 0, then P1.7/MDY is a standard port line. If bit EMO = 1, then P1.7/MDY is the melody output. EMO = 1 does not inhibit the port instructions for P1.7/MDY. Therefore the state of both port line and flip-flop may be read in and the port flip-flop may be written by port instructions. However, the port flip-flop of P1.7/MDY must remain set to avoid conflicts between melody and port outputs. When the HGF contents are zero while EMO = 1, P1.7/MDY is in the HIGH state. |
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