TMF8801 datasheet(24/73 Pages) OSRAM

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TMF8801

Datasheet

• PUBLIC

DS000648

• v10-00 • 2022-Dec-20

│ 23

Addr: 0xE1

INT_STATUS

Field

Name

Rst

Type

Description

int1

R_PUSH1

Object detection interrupt for App0; asserted when a

result from object detection is available

int1 status. If bis is asserted, and int1_enab is asserted

as well, then the INT pin will be pulled low. Writing a '1'

here will clear int1 condition.

Note: An interrupt is raised on every result from object

detection including no-target unless persistence is set

> 0.

8.6

INT_ENAB Register (Address 0xE2)

Figure 26:

INT_ENAB Register

Addr: 0xE2

INT_ENAB

Field

Name

Rst

Type

Description

int2_enab

Raw histogram available interrupt for App0; asserted

when a raw histogram can be retrieved from I²C.

0=disabled, 1=enabled -> INT output is active if int2

flag is "1"

int1_enab

Object detection interrupt for App0; asserted when a

result from object detection is available

0=disabled, 1=enabled -> INT output is active if int1

flag is "1"

8.7

ID Register (Address 0xE3)

Figure 27:

ID Register

Addr: 0xE3

Field

Name

Rst

Type

Description

5:0

Chip ID, reads 07h

– do not rely on register bits 6 and

7 of this register.

TMF8801 Datasheet(PDF) 24 Page - OSRAM GmbH

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