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LRI2K Datasheet(PDF) 18 Page - STMicroelectronics

No. de pieza LRI2K
Descripción Electrónicos  13.56 MHz, 2048-bit EEPROM tag IC with 64-bit UID and kill code, ISO 15693 and ISO 18000-3 Mode 1 compliant
PDF  89 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

LRI2K Datasheet(HTML) 18 Page - STMicroelectronics

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Data rate and data coding
LRI2K
18/89
3.3
VCD to LRI2K frames
Frames are delimited by a start of frame (SOF) and an end of frame (EOF). They are
implemented using code violation. Unused options are reserved for future use.
The LRI2K is ready to receive a new command frame from the VCD 311.5 µs (t2) after
sending a response frame to the VCD.
The LRI2K takes a Power-On time of 0.1 ms after being activated by the powering field.
After this delay, the LRI2K is ready to receive a command frame from the VCD.
3.4
Start of frame (SOF)
The SOF defines the data coding mode the VCD is to use for the following command frame.
The SOF sequence described in Figure 9 selects the 1 out of 256 data coding mode.
The SOF sequence described in Figure 10 selects the 1 out of 4 data coding mode.
The EOF sequence for either coding mode is described in Figure 11.
Figure 9.
SOF to select 1 out of 256 data coding mode
Figure 10.
SOF to select 1 out of 4 data coding mode
Figure 11.
EOF for either data coding mode
AI06661
37.76 µs
9.44 µs
9.44 µs
37.76 µs
AI06660
37.76 µs
9.44 µs
9.44 µs
37.76 µs
9.44 µs
AI06662
9.44 µs
37.76 µs
9.44 µs



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