25LC080A-ESLASHMS datasheet(10/26 Pages) MICROCHIP

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25XX080A/B

DS21808D-page 10

2.5

Read Status Register Instruction

(RDSR)

The Read Status Register instruction (RDSR) provides

access to the Status Register. The Status Register may

be read at any time, even during a write cycle. The

Status Register is formatted as follows:

TABLE 2-2:

STATUS REGISTER

The Write-In-Process (WIP) bit indicates whether the

25XX080A/B is busy with a write operation. When set

to a ‘1’, a write is in progress, when set to a ‘0’, no write

is in progress. This bit is read-only.

The Write Enable Latch (WEL) bit indicates the status

of the write enable latch and is read only. When set to

a ‘1’, the latch allows writes to the array or the Status

the array or the Status Register. The state of this bit can

always be updated via the WREN or WRDI commands

regardless of the state of write protection on the Status

and Figure 2-5.

The Block Protection (BP0 and BP1) bits indicate

which blocks are currently write-protected. These bits

are set by the user issuing the WRSR instruction, which

is in Figure 2-7. These bits are nonvolatile and are

shown in Table 2-3.

See Figure 2-6 for the RDSR timing sequence.

FIGURE 2-6:

READ STATUS REGISTER TIMING SEQUENCE (RDSR)

654

W/R

–––

W/R

WPEN

BP1

BP0

WEL

WIP

W/R = writable/readable. R = read-only.

1011

12131415

instruction

data from Status Register

high-impedance

SCK

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