FALXT972MCCA4 datasheet(47/92 Pages) INTEL

47 / 92 page

Intel

® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Datasheet

Document Number: 302875-005

Revision Date: 27-Oct-2005

CONTROL

0 1 0 1

J 2

1 1 0 0 0

Start-of-Stream Delimiter (SSD),

part 1 of 2

0 1 0 1

K 2

1 0 0 0 1

Start-of-Stream Delimiter (SSD),

part 2 of 2

Undefined

T 3

0 1 1 0 1

End-of-Stream Delimiter (ESD),

part 1 of 2

Undefined

R 3

0 0 1 1 1

End-of-Stream Delimiter (ESD),

part 2 of 2

INVALID

Undefined

H 4

0 0 1 0 0

Transmit Error. Used to force signaling

errors

Undefined

Invalid

0 0 0 0 0

Invalid

Undefined

Invalid

0 0 0 0 1

Invalid

Undefined

Invalid

0 0 0 1 0

Invalid

Undefined

Invalid

0 0 0 1 1

Invalid

Undefined

Invalid

0 0 1 0 1

Invalid

Undefined

Invalid

0 0 1 1 0

Invalid

Undefined

Invalid

0 1 0 0 0

Invalid

Undefined

Invalid

0 1 1 0 0

Invalid

Undefined

Invalid

1 0 0 0 0

Invalid

Undefined

Invalid

1 1 0 0 1

Invalid

Table 15. 4B/5B Coding (Sheet 2 of 2)

Code Type

4B Code

3 2 1 0

Name

5B Code

4 3 2 1 0

Interpretation

1. The /I/ (Idle) code group is sent continuously between frames.

2. The /J/ and /K/ (SSD) code groups are always sent in pairs, and /K/ follows /J/.

3. The /T/ and /R/ (ESD) code groups are always sent in pairs, and /R/ follows /T/.

4. An /H/ (Error) code group is used to signal an error condition.

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