AP2953AS8PR datasheet(6/9 Pages) CHIPOWN

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AP2953A

Chipown

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No.21-1 Changjiang Road, Wuxi New Destrict Tel: +86(510)8521-7718

http://www.chipown.com.cn

V2.0

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should be placed as close to the IC as possible. When using

ceramic capacitors, make sure that they have enough

capacitance to provide sufficient charge to prevent excessive

voltage ripple at input. The input voltage ripple for low ESR

capacitors can be estimated by:

Where C1 is the input capacitance value.

Output Capacitor

The output capacitor is required to maintain the DC output

voltage.

Ceramic,

tantalum,

low

ESR

electrolytic

capacitors are recommended. Low ESR capacitors are

preferred to keep the output voltage ripple low. The output

voltage ripple can be estimated by:

Where C2 is the output capacitance value and RESR is the

equivalent series resistance (ESR) value of the output capacitor.

In the case of ceramic capacitors, the impedance at the

switching frequency is dominated by the capacitance. The

output voltage ripple is mainly caused by the capacitance. For

simplification, the output voltage ripple can be estimated by:

In the case of tantalum or electrolytic capacitors, the ESR

dominates the impedance at the switching frequency. For

simplification, the output ripple can be approximated to:

The characteristics of the output capacitor also affect the

stability of the regulation system. The AP2953A can be

optimized for a wide range of capacitance and ESR values.

Compensation Components

AP2953A

employs

current

mode

control

for

easy

compensation and fast transient response. The system stability

and transient response are controlled through the COMP pin.

COMP pin is the output of the internal transconductance error

amplifier. A series capacitor-resistor combination sets a

pole-zero combination to control the characteristics of the

control system.

The DC gain of the voltage feedback loop is given by:

Where VFB is the feedback voltage, 0.925V;

AVEA is the error amplifier voltage gain; GCS is the current

sense transconductance and RLOAD is the load resistor value.

The system has two poles of importance. One is due to the

compensation capacitor (C3) and the output resistor of the

error amplifier, and the other is due to the output capacitor

and the load resistor. These poles are located at:

Where GEA is the error amplifier transconductance.

The system has one zero of importance, due to the

compensation capacitor (C3) and the compensation resistor

(R3). This zero is located at:

The system may have another zero of importance, if the output

capacitor has a large capacitance and/or a high ESR value. The

zero, due to the ESR and capacitance of the output capacitor, is

located at:

In this case (as shown in Figure 4), a third pole set by the

compensation capacitor (C6) and the compensation resistor

(R3) is used to compensate the effect of the ESR zero on the

loop gain. This pole is located at:

The goal of compensation design is to shape the converter

transfer function to get a desired loop gain. The system

crossover frequency where the feedback loop has the unity

gain is important. Lower crossover frequencies result in slower

line and load transient responses, while higher crossover

frequencies could cause system instability. A good rule of

thumb is to set the crossover frequency below one-tenth of the

switching frequency.

To optimize the compensation components, the following

procedure can be used.

1. Choose the compensation resistor (R3) to set the desired

crossover frequency. Determine the R3 value by the following

equation:

Where fC is the desired crossover frequency which is typically

below one tenth of the switching frequency.

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