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L2572-S16-R Datasheet(PDF) 12 Page - Unisonic Technologies |
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L2572-S16-R Datasheet(HTML) 12 Page - Unisonic Technologies |
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12 / 14 page ![]() L2572 LINEAR INTEGRATED CIRCUIT UNISONICTECHNOLOGIESCO.,LTD 12 of 14 www.unisonic.com.tw QW-R102-032.A DESIGN OF PLL LOOP PARAMETERS The UTC L2572 is normally used as a type 1 second order loop and can be represented by the above diagram. For such a system the following parameters apply; τ1 = C1.R1 τ2 = C1.R2 and 2 0 1 n D K K ω τ = n ω ζ τ 2 2 = where: K0 is the VCO gain in radian seconds per volt KD is the phase detector gain in volts per radian ωn is the natural loop bandwidth ξ is the loop damping factor R1 is loop amplifier input impedance Note: K0 is dependant on sensitivity of VCO used. KD = 0.25V/rad single ended, 0.5V/rad differential From these factors the loop 3dB bandwidth can be determined from the following expression; 1 ) 1 2 ( ) 1 2 ( 2 2 2 2 2 2 3 + + ± + = ζ ω ζ ω ω n n dB Which approximates to n dB ω ω 2 3 = when 2 1 = ζ |
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