Data Sheet

LTM4640

analog.com

Rev. 0

21 of 38

From Equation 8, we could easily find that, in coincident tracking, the subordinate regulator’s TRACK/SS pin

resistor divider is always the same as its feedback divider (Equation 9).

������������������(������������������)

������������������(������������������) + 10������Ω

=

������������������(������������������)

������������������(������������������) + ������������������(������������������)

(9)

For example, RTR(TOP) = 10kΩ and RTR(BOT) = 10kΩ is a good combination for coincident tracking for a VOUT(MAIN)= 1.5V

and VOUT(SUB)= 1.2V application.

Power Good

The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin is pulled

low when the output voltage exceeds a ±8% window around the regulation point. To prevent unwanted PGOOD

glitches during transients or dynamic VOUT changes, the LTM4640’s PGOOD falling edge includes a blanking delay

of approximately 25 switching cycles.

RUN Enable

Pulling the RUN pin to ground forces the LTM4640 into the shutdown state, turning off both power MOSFETs and

most of its internal control circuitry. Bringing the RUN pin above 0.6V turns on the internal reference only, while

keeping the power MOSFETs off. Increasing the RUN pin voltage above 1.35V turns on the entire device.

Prebiased Output Startup

There may be situations that require the power supply to start up with some charge on the output capacitors. The

LTM4640 can safely power up into a prebiased output without discharging it.

The LTM4640 accomplishes this by forcing discontinuous-conduction mode (DCM) operation until the TRACK/SS

pin voltage reaches 0.6V reference voltage. This prevents the bottom FET from turning on during the prebiased

output startup, which would discharge the output.

SW Pins and Optional Snubber Circuit

The SW pin is generally for testing purposes. The SW pin can also be used to dampen out switch node ringing

caused by the LC parasitic in the switched current path using a series R-C snubber circuit. The resistor dampens the

resonance, and the capacitor is chosen to only affect the high-frequency ringing across the resistor. The snubber

circuit is optional, as the LTM4640 can operate well with proper PCB layout. If needed, below are suggestions

regarding snubber circuit design.

If the stray inductance or capacitance can be measured or approximated, then it is possible to use an analytical

technique to select the snubber values. The inductance is usually easier to predict. It combines the power path

board inductance in combination with the MOSFET interconnect bond wire inductance.

First, the SW pin is monitored with a wide bandwidth scope with a high frequency scope probe. The ring frequency

is measured for its value. The impedance ZL is calculated with Equation 10.

������������ = 2π × f × L

(10)

where f is the resonant frequency of the ring, and L is the total parasitic inductance in the switch path. If a resistor is

selected that is equal to ZL, then the ringing should be dampened. The snubber capacitor value is chosen so that its

impedance is equal to the resistor at the ring frequency. This is calculated with Equation 11.