SC4150HIS-4TRT datasheet(6/12 Pages) SEMTECH

6 / 12 page

 2004 Semtech Corp.

www.semtech.com

SC4150

POWER MANAGEMENT

Insertion of a power circuit board into a live backplane

would draw enormous inrush currents. This is mostly due

to the charging of the bulk electrolytic capacitors at the

input of the power module being plugged in.

The transient currents would send glitches all over the

power system and could cause corruption of the signals

and even a power down if the source isn’t able to handle

these high surges.

This section describes the components selection needed

for a typical application utilizing the SC4150. Let’s assume

the following requirements for a representative system:

Input voltage range: 36V to 72V

Nominal current: 2A typ.

Over-current condition: 5A

Bulk capacitance: Cload = 150µF

The schematic in Figure 2 combines internal function

blocks along with the external components of the

application circuit.

Resistors R1, R2 and R3 make up a voltage divider to

set the Under-Voltage (UV) and Over-Voltage (OV) trip

points.

When the input power supply ramps up the UV trips at

1.273V and OV trips at 1.223V; during the ramp down

transition the UV trips at 1.223V and OV trips at 1.198V.

The 50mV hysteresis for UV and 25mV hysteresis for OV

provide the necessary guard-bands to prevent false

tripping during power up and power down conditions.

As an additional noise killing and stabilizing measure, the

capacitor C1 should be placed at the OV terminal with

the value in range from 1,000 to 10,000pF.

For the UV=38V and OV=70V the values of the resistor

can be calculated as follows:

Vuv = 1.273V · (R1+R2+R3) ÷ (R2+R3)

Vov = 1.223V · (R1+R2+R3) ÷ R3

Applications Information

Figure 2

60mV

+7V

Delay

DRAIN

GATE

SENSE

Vee

Vcc

12.5V Reg

1.223V

1.75V

PWRGD

50uA

Timer

Cload

150uF

-48V

+48V

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